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SSE Conversion instructions
These instructions support packed and scalar
conversions between 128-bit SIMD floating-point registers and either 64-bit
integer MMX registers or 32-bit integer x86 registers.
CVTPI2PS converts two 32-bit signed integers
in an MMX register to the two least significant numbers of the SSE destination
register. The upper two significant numbers in the destination register
are retained.
CVTSI2SS converts a 32-bit signed integer
in an MMX register to the least significant number of the SSE destination
register. The upper three significant numbers in the destination register
are retained.
CVTPS2PI converts the two least significant
numbers int the source SSE operand to two 32-bit signed integers in an
MMX register. CVTTPS2PI is similar to CVTPS2PI, except that when the conversion
is inexact, the truncated result is returned.
CVTSS2SI converts the least significant
number of the source SSE operand to a 32-bit signed integer in an x86 32-bit
integer register. CVTTSS2SI is similar to CVTSS2SI, except that when the
conversion is inexact, the truncated result is returned.
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